Research Fellow in Analogue IC Design

Job listing information

• Reference ENG01096
• Date posted 11 November 2019
• Closing date 11 December 2019

Key information about the role

•  
  Location South Kensington Campus (map)

• Position type Full time, fixed term
• Salary £45,615 – £53,988 plus benefits

• Department Department of Electrical and Electronic Engineering
• Category Researcher / Non Clinical Researcher

Job description

Job summary

The position will be part of the FORTE (Functional Oxide Reconfigurable Technologies) project that has been supported by EPSRC through a 5-year, £6M collaborative programme grant between Southampton, Imperial and Manchester (see www.imperial.ac.uk/next-generation-neural-interfaces/projects/forte/ and www.forte.ac.uk). This programme aims to develop a new integrated technology that extends CMOS technology to include ReRAM devices, and exploits this in emerging applications in AI and medical devices.

Duties and responsibilities

The postholder will join a highly dedicated team at Imperial with overall responsibility of CMOS technology integration – including design tool and process design kit integration, design and prototyping test devices, structures, circuits and systems, and co-ordinating/supporting the dedicated engineering runs with the CMOS foundry partner. This role of this position specifically will be to lead the CMOS technology integration efforts. You will be responsible for EDA tool and design kit integration and develop a library of analogue cells for wide dissemination and use throughout the consortium. You will also be leading and co-ordinating the dedicated engineering runs in CMOS technology. For this you will be the key point of contact between the FORTE consortium, foundry interface and other project partners.

Essential requirements

For this role we are seeking a senior analogue IC designer with PhD degree or relevant industry experience. The ideal candidate should have deep experience working with advanced CMOS PDKs and all aspects of a full-custom EDA tool flow, have strong analogue and mixed-signal transistor-level CMOS design experience, and first-hand experience of multiple successful mixed signal designs, from concept to silicon-verified measurements.

Further information

Please contact t.constandinou@imperial.ac.uk copying i.wojcicka@imperial.ac.uk for informal queries regarding the Imperial College post.

Our preferred method of application is online via our website. Please click ‘apply’ below or go to https://www.imperial.ac.uk/job-applicants/ https://www.imperial.ac.uk/job-applicants/ and search using reference number ENG01096.


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Documents

• RF in Analogue IC Design .pdf